Merge pull request #17922 from joy2myself:build_riscv_with_c++_intrin

modules/core/include/opencv2/core/cv_cpu_dispatch.h

@@ -168,6 +168,10 @@
 #  include <wasm_simd128.h>
 #endif
 
+#if defined CV_CPU_COMPILE_RVV
+#  define CV_RVV 1
+#endif
+
 #endif // CV_ENABLE_INTRINSICS && !CV_DISABLE_OPTIMIZATION && !__CUDACC__
 
 #if defined CV_CPU_COMPILE_AVX && !defined CV_CPU_BASELINE_COMPILE_AVX
@@ -343,3 +347,7 @@ struct VZeroUpperGuard {
 #ifndef CV_WASM_SIMD
 #  define CV_WASM_SIMD 0
 #endif
+
+#ifndef CV_RVV
+#  define CV_RVV 0
+#endif

modules/core/include/opencv2/core/cv_cpu_helper.h

@@ -483,5 +483,26 @@
 #endif
 #define __CV_CPU_DISPATCH_CHAIN_VSX3(fn, args, mode, ...)  CV_CPU_CALL_VSX3(fn, args); __CV_EXPAND(__CV_CPU_DISPATCH_CHAIN_ ## mode(fn, args, __VA_ARGS__))
 
+#if !defined CV_DISABLE_OPTIMIZATION && defined CV_ENABLE_INTRINSICS && defined CV_CPU_COMPILE_RVV
+#  define CV_TRY_RVV 1
+#  define CV_CPU_FORCE_RVV 1
+#  define CV_CPU_HAS_SUPPORT_RVV 1
+#  define CV_CPU_CALL_RVV(fn, args) return (cpu_baseline::fn args)
+#  define CV_CPU_CALL_RVV_(fn, args) return (opt_RVV::fn args)
+#elif !defined CV_DISABLE_OPTIMIZATION && defined CV_ENABLE_INTRINSICS && defined CV_CPU_DISPATCH_COMPILE_RVV
+#  define CV_TRY_RVV 1
+#  define CV_CPU_FORCE_RVV 0
+#  define CV_CPU_HAS_SUPPORT_RVV (cv::checkHardwareSupport(CV_CPU_RVV))
+#  define CV_CPU_CALL_RVV(fn, args) if (CV_CPU_HAS_SUPPORT_RVV) return (opt_RVV::fn args)
+#  define CV_CPU_CALL_RVV_(fn, args) if (CV_CPU_HAS_SUPPORT_RVV) return (opt_RVV::fn args)
+#else
+#  define CV_TRY_RVV 0
+#  define CV_CPU_FORCE_RVV 0
+#  define CV_CPU_HAS_SUPPORT_RVV 0
+#  define CV_CPU_CALL_RVV(fn, args)
+#  define CV_CPU_CALL_RVV_(fn, args)
+#endif
+#define __CV_CPU_DISPATCH_CHAIN_RVV(fn, args, mode, ...)  CV_CPU_CALL_RVV(fn, args); __CV_EXPAND(__CV_CPU_DISPATCH_CHAIN_ ## mode(fn, args, __VA_ARGS__))
+
 #define CV_CPU_CALL_BASELINE(fn, args) return (cpu_baseline::fn args)
 #define __CV_CPU_DISPATCH_CHAIN_BASELINE(fn, args, mode, ...)  CV_CPU_CALL_BASELINE(fn, args) /* last in sequence */

modules/core/include/opencv2/core/cvdef.h

@@ -272,6 +272,8 @@ namespace cv {
 #define CV_CPU_VSX              200
 #define CV_CPU_VSX3             201
 
+#define CV_CPU_RVV              210
+
 // CPU features groups
 #define CV_CPU_AVX512_SKX       256
 #define CV_CPU_AVX512_COMMON    257
@@ -324,6 +326,8 @@ enum CpuFeatures {
     CPU_VSX             = 200,
     CPU_VSX3            = 201,
 
+    CPU_RVV             = 210,
+
     CPU_AVX512_SKX      = 256, //!< Skylake-X with AVX-512F/CD/BW/DQ/VL
     CPU_AVX512_COMMON   = 257, //!< Common instructions AVX-512F/CD for all CPUs that support AVX-512
     CPU_AVX512_KNL      = 258, //!< Knights Landing with AVX-512F/CD/ER/PF

modules/core/include/opencv2/core/hal/intrin.hpp

@@ -199,6 +199,7 @@ using namespace CV_CPU_OPTIMIZATION_HAL_NAMESPACE;
 #   undef CV_VSX
 #   undef CV_FP16
 #   undef CV_MSA
+#   undef CV_RVV
 #endif
 
 #if (CV_SSE2 || CV_NEON || CV_VSX || CV_MSA || CV_WASM_SIMD) && !defined(CV_FORCE_SIMD128_CPP)
@@ -226,6 +227,9 @@ using namespace CV_CPU_OPTIMIZATION_HAL_NAMESPACE;
 #elif CV_WASM_SIMD && !defined(CV_FORCE_SIMD128_CPP)
 #include "opencv2/core/hal/intrin_wasm.hpp"
 
+#elif CV_RVV && !defined(CV_FORCE_SIMD128_CPP)
+#include "opencv2/core/hal/intrin_rvv.hpp"
+
 #else
 
 #include "opencv2/core/hal/intrin_cpp.hpp"

modules/core/src/system.cpp

@@ -399,6 +399,8 @@ struct HWFeatures
         g_hwFeatureNames[CPU_AVX512_CNL] = "AVX512-CNL";
         g_hwFeatureNames[CPU_AVX512_CLX] = "AVX512-CLX";
         g_hwFeatureNames[CPU_AVX512_ICL] = "AVX512-ICL";
+
+        g_hwFeatureNames[CPU_RVV] = "RVV";
     }
 
     void initialize(void)
@@ -597,6 +599,10 @@ struct HWFeatures
         have[CV_CPU_VSX3] = (CV_VSX3);
     #endif
 
+    #if defined __riscv && defined __riscv_vector
+        have[CV_CPU_RVV] = true;
+    #endif
+
         bool skip_baseline_check = false;
 #ifndef NO_GETENV
         if (getenv("OPENCV_SKIP_CPU_BASELINE_CHECK"))