Merge pull request #15422 from mipsopen-fwu:msa-dev
* Added MSA implementations for mips platforms. Intrinsics for MSA and build scripts for MIPS platforms are added. Signed-off-by: Fei Wu <fwu@wavecomp.com> * Removed some unused code in mips.toolchain.cmake. Signed-off-by: Fei Wu <fwu@wavecomp.com> * Added comments for mips toolchain configuration and disabled compiling warnings for libpng. Signed-off-by: Fei Wu <fwu@wavecomp.com> * Fixed the build error of unsupported opcode 'pause' when mips isa_rev is less than 2. Signed-off-by: Fei Wu <fwu@wavecomp.com> * 1. Removed FP16 related item in MSA option defines in OpenCVCompilerOptimizations.cmake. 2. Use CV_CPU_COMPILE_MSA instead of __mips_msa for MSA feature check in cv_cpu_dispatch.h. 3. Removed hasSIMD128() in intrin_msa.hpp. 4. Define CPU_MSA as 150. Signed-off-by: Fei Wu <fwu@wavecomp.com> * 1. Removed unnecessary CV_SIMD128_64F guarding in intrin_msa.hpp. 2. Removed unnecessary CV_MSA related code block in dotProd_8u(). Signed-off-by: Fei Wu <fwu@wavecomp.com> * 1. Defined CPU_MSA_FLAGS_ON as "-mmsa". 2. Removed CV_SIMD128_64F guardings in intrin_msa.hpp. Signed-off-by: Fei Wu <fwu@wavecomp.com> * Removed unused msa_mlal_u16() and msa_mlal_s16 from msa_macros.h. Signed-off-by: Fei Wu <fwu@wavecomp.com>
This commit is contained in:
committed by
Alexander Alekhin
parent
33e9fe9312
commit
b1ea91d8bd
@@ -152,6 +152,11 @@
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# define CV_VSX3 1
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#endif
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#ifdef CV_CPU_COMPILE_MSA
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# include "hal/msa_macros.h"
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# define CV_MSA 1
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#endif
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#endif // CV_ENABLE_INTRINSICS && !CV_DISABLE_OPTIMIZATION && !__CUDACC__
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#if defined CV_CPU_COMPILE_AVX && !defined CV_CPU_BASELINE_COMPILE_AVX
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@@ -319,3 +324,7 @@ struct VZeroUpperGuard {
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#ifndef CV_VSX3
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# define CV_VSX3 0
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#endif
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#ifndef CV_MSA
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# define CV_MSA 0
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#endif
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@@ -420,6 +420,27 @@
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#endif
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#define __CV_CPU_DISPATCH_CHAIN_NEON(fn, args, mode, ...) CV_CPU_CALL_NEON(fn, args); __CV_EXPAND(__CV_CPU_DISPATCH_CHAIN_ ## mode(fn, args, __VA_ARGS__))
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#if !defined CV_DISABLE_OPTIMIZATION && defined CV_ENABLE_INTRINSICS && defined CV_CPU_COMPILE_MSA
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# define CV_TRY_MSA 1
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# define CV_CPU_FORCE_MSA 1
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# define CV_CPU_HAS_SUPPORT_MSA 1
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# define CV_CPU_CALL_MSA(fn, args) return (cpu_baseline::fn args)
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# define CV_CPU_CALL_MSA_(fn, args) return (opt_MSA::fn args)
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#elif !defined CV_DISABLE_OPTIMIZATION && defined CV_ENABLE_INTRINSICS && defined CV_CPU_DISPATCH_COMPILE_MSA
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# define CV_TRY_MSA 1
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# define CV_CPU_FORCE_MSA 0
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# define CV_CPU_HAS_SUPPORT_MSA (cv::checkHardwareSupport(CV_CPU_MSA))
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# define CV_CPU_CALL_MSA(fn, args) if (CV_CPU_HAS_SUPPORT_MSA) return (opt_MSA::fn args)
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# define CV_CPU_CALL_MSA_(fn, args) if (CV_CPU_HAS_SUPPORT_MSA) return (opt_MSA::fn args)
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#else
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# define CV_TRY_MSA 0
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# define CV_CPU_FORCE_MSA 0
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# define CV_CPU_HAS_SUPPORT_MSA 0
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# define CV_CPU_CALL_MSA(fn, args)
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# define CV_CPU_CALL_MSA_(fn, args)
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#endif
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#define __CV_CPU_DISPATCH_CHAIN_MSA(fn, args, mode, ...) CV_CPU_CALL_MSA(fn, args); __CV_EXPAND(__CV_CPU_DISPATCH_CHAIN_ ## mode(fn, args, __VA_ARGS__))
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#if !defined CV_DISABLE_OPTIMIZATION && defined CV_ENABLE_INTRINSICS && defined CV_CPU_COMPILE_VSX
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# define CV_TRY_VSX 1
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# define CV_CPU_FORCE_VSX 1
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@@ -258,6 +258,8 @@ namespace cv { namespace debug_build_guard { } using namespace debug_build_guard
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#define CV_CPU_NEON 100
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#define CV_CPU_MSA 150
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#define CV_CPU_VSX 200
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#define CV_CPU_VSX3 201
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@@ -308,6 +310,8 @@ enum CpuFeatures {
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CPU_NEON = 100,
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CPU_MSA = 150,
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CPU_VSX = 200,
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CPU_VSX3 = 201,
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@@ -165,9 +165,10 @@ using namespace CV_CPU_OPTIMIZATION_HAL_NAMESPACE;
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# undef CV_NEON
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# undef CV_VSX
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# undef CV_FP16
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# undef CV_MSA
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#endif
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#if CV_SSE2 || CV_NEON || CV_VSX
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#if CV_SSE2 || CV_NEON || CV_VSX || CV_MSA
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#define CV__SIMD_FORWARD 128
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#include "opencv2/core/hal/intrin_forward.hpp"
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#endif
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@@ -185,6 +186,10 @@ using namespace CV_CPU_OPTIMIZATION_HAL_NAMESPACE;
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#include "opencv2/core/hal/intrin_vsx.hpp"
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#elif CV_MSA
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#include "opencv2/core/hal/intrin_msa.hpp"
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#else
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#define CV_SIMD128_CPP 1
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