CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
356 lines
13 KiB
C++
356 lines
13 KiB
C++
/*M///////////////////////////////////////////////////////////////////////////////////////
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//
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// IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.
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//
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// By downloading, copying, installing or using the software you agree to this license.
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// If you do not agree to this license, do not download, install,
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// copy or use the software.
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//
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//
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// License Agreement
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// For Open Source Computer Vision Library
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//
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// Copyright (C) 2013, OpenCV Foundation, all rights reserved.
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// Copyright (C) 2017, Intel Corporation, all rights reserved.
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// Third party copyrights are property of their respective owners.
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//
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// Redistribution and use in source and binary forms, with or without modification,
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// are permitted provided that the following conditions are met:
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//
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// * Redistribution's of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// * Redistribution's in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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//
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// * The name of the copyright holders may not be used to endorse or promote products
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// derived from this software without specific prior written permission.
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//
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// This software is provided by the copyright holders and contributors "as is" and
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// any express or implied warranties, including, but not limited to, the implied
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// warranties of merchantability and fitness for a particular purpose are disclaimed.
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// In no event shall the Intel Corporation or contributors be liable for any direct,
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// indirect, incidental, special, exemplary, or consequential damages
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// (including, but not limited to, procurement of substitute goods or services;
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// loss of use, data, or profits; or business interruption) however caused
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// and on any theory of liability, whether in contract, strict liability,
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// or tort (including negligence or otherwise) arising in any way out of
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// the use of this software, even if advised of the possibility of such damage.
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//
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//M*/
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#include "../precomp.hpp"
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#include "layers_common.hpp"
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#include "../op_cuda.hpp"
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#include "../op_halide.hpp"
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#include "../op_inf_engine.hpp"
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#include "../op_vkcom.hpp"
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#ifdef HAVE_OPENCL
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#include "opencl_kernels_dnn.hpp"
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#endif
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#ifdef HAVE_CUDA
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#include "../cuda4dnn/primitives/concat.hpp"
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using namespace cv::dnn::cuda4dnn;
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#endif
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namespace cv
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{
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namespace dnn
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{
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class ConcatLayerImpl CV_FINAL : public ConcatLayer
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{
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public:
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ConcatLayerImpl(const LayerParams& params)
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{
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setParamsFrom(params);
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axis = params.get<int>("axis", 1);
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padding = params.get<bool>("padding", false);
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}
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virtual bool getMemoryShapes(const std::vector<MatShape> &inputs,
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const int requiredOutputs,
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std::vector<MatShape> &outputs,
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std::vector<MatShape> &internals) const CV_OVERRIDE
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{
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CV_Assert(inputs.size() > 0);
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outputs.resize(1, inputs[0]);
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int cAxis = clamp(axis, inputs[0]);
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int axisSum = 0;
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for (size_t i = 0; i < inputs.size(); i++)
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{
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MatShape curShape = inputs[i];
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if (padding)
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{
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for (int curAxis = 0; curAxis < outputs[0].size(); curAxis++)
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{
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outputs[0][curAxis] = std::max(outputs[0][curAxis], curShape[curAxis]);
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}
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}
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else
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{
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CV_Assert(curShape.size() == outputs[0].size());
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for (int curAxis = 0; curAxis < outputs[0].size(); curAxis++)
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{
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if (curAxis != cAxis && outputs[0][curAxis] != curShape[curAxis])
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CV_Error(Error::StsBadSize, "Inconsistent shape for ConcatLayer");
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}
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}
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axisSum += curShape[cAxis];
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}
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outputs[0][cAxis] = axisSum;
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return false;
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}
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virtual bool supportBackend(int backendId) CV_OVERRIDE
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{
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return backendId == DNN_BACKEND_OPENCV ||
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backendId == DNN_BACKEND_CUDA ||
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(backendId == DNN_BACKEND_HALIDE && haveHalide() && axis == 1 && !padding) || // By channels
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(backendId == DNN_BACKEND_INFERENCE_ENGINE && haveInfEngine() && !padding) ||
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(backendId == DNN_BACKEND_VKCOM && haveVulkan() && !padding);
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}
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class ChannelConcatInvoker : public ParallelLoopBody
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{
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public:
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std::vector<Mat>* inputs;
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Mat* output;
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int nstripes;
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std::vector<const float*> chptrs;
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static void run(std::vector<Mat>& inputs, Mat& output, int nstripes)
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{
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ChannelConcatInvoker cc;
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cc.inputs = &inputs;
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cc.output = &output;
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cc.nstripes = nstripes;
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size_t i, ninputs = inputs.size();
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int nchannels = 0, batchsz = output.size[0];
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for( i = 0; i < ninputs; i++ )
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{
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Mat& inp = inputs[i];
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CV_Assert( inp.isContinuous() && (inp.type() == CV_32F || inp.type() == CV_16S) &&
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inp.dims == 4 && inp.size[0] == output.size[0] &&
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inp.size[2] == output.size[2] &&
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inp.size[3] == output.size[3] );
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nchannels += inp.size[1];
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}
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CV_Assert( nchannels == output.size[1] );
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CV_Assert( output.isContinuous() && (output.type() == CV_32F || output.type() == CV_16S) );
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cc.chptrs.resize(nchannels*batchsz);
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int ofs = 0;
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for( i = 0; i < ninputs; i++)
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{
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Mat& inp = inputs[i];
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for( int j = 0; j < batchsz; j++ )
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for( int k = 0; k < inp.size[1]; k++ )
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{
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const float* ptr = inp.ptr<float>(j, k);
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cc.chptrs[ofs + j*nchannels + k] = ptr;
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}
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ofs += inp.size[1];
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}
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parallel_for_(Range(0, nstripes), cc, nstripes);
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}
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ChannelConcatInvoker() : inputs(0), output(0), nstripes(0) {}
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void operator()(const Range& r) const CV_OVERRIDE
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{
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size_t planeSize = (size_t)output->size[2]*output->size[3];
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size_t nch = chptrs.size();
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size_t total = nch*planeSize;
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size_t stripeSize = (total + nstripes - 1)/nstripes;
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size_t stripeStart = r.start*stripeSize;
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size_t stripeEnd = std::min(total, r.end*stripeSize);
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const float** ptrs = (const float**)&chptrs[0];
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float* outptr = output->ptr<float>();
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size_t blockSize0 = 1 << 16;
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for( size_t ofs0 = stripeStart; ofs0 < stripeEnd; )
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{
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size_t ch = ofs0/planeSize;
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size_t ofs = ofs0 - ch*planeSize;
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size_t blockSize = std::min(blockSize0, planeSize - ofs);
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memcpy(outptr + ofs0, ptrs[ch] + ofs, blockSize*sizeof(outptr[0]));
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ofs0 += blockSize;
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}
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}
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};
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#ifdef HAVE_OPENCL
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bool forward_ocl(InputArrayOfArrays inps, OutputArrayOfArrays outs, OutputArrayOfArrays internals)
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{
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std::vector<UMat> inputs;
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std::vector<UMat> outputs;
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bool use_half = (inps.depth() == CV_16S);
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inps.getUMatVector(inputs);
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outs.getUMatVector(outputs);
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int cAxis = clamp(axis, inputs[0].dims);
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if (padding)
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return false;
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int bottom_concat_axis;
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int concat_size = total(shape(inputs[0]), cAxis + 1);
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int top_concat_axis = outputs[0].size[cAxis];
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int num_concats = total(shape(inputs[0]), 0, cAxis);
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int offset_concat_axis = 0;
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UMat& outMat = outputs[0];
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String buildopt = format(" -DDtype=%s", (use_half) ? "half" : "float");
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String kname = format("concat_%s", use_half ? "half" : "float");
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for (size_t i = 0; i < inputs.size(); i++)
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{
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ocl::Kernel kernel(kname.c_str(), ocl::dnn::concat_oclsrc, buildopt);
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if (kernel.empty())
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return false;
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UMat& inpMat = inputs[i];
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bottom_concat_axis = inputs[i].size[cAxis];
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size_t nthreads = inputs[i].total();
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kernel.set(0, (int)nthreads);
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kernel.set(1, ocl::KernelArg::PtrReadOnly(inpMat));
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kernel.set(2, (int)num_concats);
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kernel.set(3, (int)concat_size);
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kernel.set(4, (int)top_concat_axis);
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kernel.set(5, (int)bottom_concat_axis);
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kernel.set(6, (int)offset_concat_axis);
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kernel.set(7, ocl::KernelArg::PtrWriteOnly(outMat));
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if (!kernel.run(1, &nthreads, NULL, false))
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return false;
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offset_concat_axis += bottom_concat_axis;
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}
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return true;
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}
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#endif
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void forward(InputArrayOfArrays inputs_arr, OutputArrayOfArrays outputs_arr, OutputArrayOfArrays internals_arr) CV_OVERRIDE
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{
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CV_TRACE_FUNCTION();
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CV_TRACE_ARG_VALUE(name, "name", name.c_str());
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CV_OCL_RUN(IS_DNN_OPENCL_TARGET(preferableTarget),
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forward_ocl(inputs_arr, outputs_arr, internals_arr))
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std::vector<Mat> inputs, outputs;
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inputs_arr.getMatVector(inputs);
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outputs_arr.getMatVector(outputs);
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int cAxis = clamp(axis, inputs[0].dims);
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Mat& outMat = outputs[0];
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if (padding)
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outMat.setTo(0);
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if( cAxis == 1 && outMat.dims == 4 && !padding)
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{
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int nstripes = getNumThreads();
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ChannelConcatInvoker::run(inputs, outMat, nstripes);
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}
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else
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{
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std::vector<Range> ranges(outputs[0].dims, Range::all());
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ranges[cAxis].start = 0;
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for (size_t i = 0; i < inputs.size(); i++)
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{
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ranges[cAxis].end = ranges[cAxis].start + inputs[i].size[cAxis];
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for (int j = 0; j < outMat.dims; ++j)
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{
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if (j == cAxis) continue;
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ranges[j].start = (outMat.size[j] - inputs[i].size[j]) / 2;
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ranges[j].end = ranges[j].start + inputs[i].size[j];
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}
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inputs[i].copyTo(outMat(&ranges[0]));
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ranges[cAxis].start = ranges[cAxis].end;
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}
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}
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}
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#ifdef HAVE_CUDA
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Ptr<BackendNode> initCUDA(
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void *context_,
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const std::vector<Ptr<BackendWrapper>>& inputs,
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const std::vector<Ptr<BackendWrapper>>& outputs
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) override
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{
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auto context = reinterpret_cast<csl::CSLContext*>(context_);
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auto input_wrapper = inputs[0].dynamicCast<CUDABackendWrapper>();
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auto concat_axis = clamp(axis, input_wrapper->getRank());
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return make_cuda_node<cuda4dnn::ConcatOp>(preferableTarget, std::move(context->stream), concat_axis, padding);
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}
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#endif
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virtual Ptr<BackendNode> initVkCom(const std::vector<Ptr<BackendWrapper> > &input) CV_OVERRIDE
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{
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#ifdef HAVE_VULKAN
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vkcom::Tensor in = VkComTensor(input[0]);
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int cAxis = clamp(axis, in.dimNum());
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std::shared_ptr<vkcom::OpBase> op(new vkcom::OpConcat(cAxis));
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return Ptr<BackendNode>(new VkComBackendNode(input, op));
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#endif // HAVE_VULKAN
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return Ptr<BackendNode>();
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}
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virtual Ptr<BackendNode> initHalide(const std::vector<Ptr<BackendWrapper> > &input) CV_OVERRIDE
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{
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#ifdef HAVE_HALIDE
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std::vector<Halide::Buffer<> > inputBuffers = halideBuffers(input);
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Halide::Var x("x"), y("y"), c("c"), n("n");
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Halide::Func top = (name.empty() ? Halide::Func() : Halide::Func(name));
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int offset = inputBuffers[0].channels();
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Halide::Expr topExpr = select(c < offset,
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inputBuffers[0](x, y, c, n),
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inputBuffers[1](x, y, c - offset, n));
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for (int i = 2; i < input.size(); ++i)
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{
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offset += inputBuffers[i - 1].channels();
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topExpr = select(c < offset, topExpr,
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inputBuffers[i](x, y, c - offset, n));
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}
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top(x, y, c, n) = topExpr;
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return Ptr<BackendNode>(new HalideBackendNode(top));
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#endif // HAVE_HALIDE
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return Ptr<BackendNode>();
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}
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#ifdef HAVE_INF_ENGINE
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virtual Ptr<BackendNode> initInfEngine(const std::vector<Ptr<BackendWrapper> >& inputs) CV_OVERRIDE
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{
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InferenceEngine::DataPtr input = infEngineDataNode(inputs[0]);
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InferenceEngine::Builder::ConcatLayer ieLayer(name);
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ieLayer.setAxis(clamp(axis, input->getDims().size()));
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ieLayer.setInputPorts(std::vector<InferenceEngine::Port>(inputs.size()));
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return Ptr<BackendNode>(new InfEngineBackendNode(ieLayer));
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}
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#endif // HAVE_INF_ENGINE
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};
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Ptr<ConcatLayer> ConcatLayer::create(const LayerParams& params)
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{
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return Ptr<ConcatLayer>(new ConcatLayerImpl(params));
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}
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}
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}
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